[Core] Unite half-duplex and full-duplex serial drivers (#13081)
* Unite half-duplex and full-duplex serial driver. * Add full duplex operation mode to the interrupt based driver * Delete DMA UART based full duplex driver * The new driver targets #11930 * Fix freezes with failing transactions in half-duplex * Increase default serial TX/RX buffer size to 128 bytes * Correctly use bool instead of size_t Co-authored-by: Nick Brassel <nick@tzarc.org>master
Stefan Kerkmann
GitHub
parent
47b12470e7
commit
117bff17ba
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@ -237,6 +237,7 @@ ifdef MCU_FAMILY
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PLATFORM=CHIBIOS
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PLATFORM_KEY=chibios
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FIRMWARE_FORMAT?=bin
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OPT_DEFS += -DMCU_$(MCU_FAMILY)
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else ifdef ARM_ATSAM
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PLATFORM=ARM_ATSAM
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PLATFORM_KEY=arm_atsam
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@ -73,7 +73,7 @@ You must also enable the ChibiOS `SERIAL` feature:
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Do note that the configuration required is for the `SERIAL` peripheral, not the `UART` peripheral.
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### USART Full-duplex
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Targeting STM32 boards where communication is offloaded to a USART hardware device. The advantage over bitbang is that this provides fast and accurate timings. USART Full-Duplex requires two conductors **without** pull-up resistors instead of one conductor with a pull-up resistor unlike the Half-duplex driver, but it is more efficent as it uses DMA transfers, which can result in even faster transmission speeds.
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Targeting STM32 boards where communication is offloaded to a USART hardware device. The advantage over bitbang is that this provides fast and accurate timings. USART Full-Duplex requires two conductors **without** pull-up resistors instead of one conductor with a pull-up resistor unlike the Half-duplex driver. Due to its internal design it is more efficent, which can result in even faster transmission speeds.
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#### Pin configuration
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@ -86,12 +86,13 @@ Please note that `TX` of the master half has to be connected with the `RX` pin o
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To use the driver, add this to your rules.mk:
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```make
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SERIAL_DRIVER = usart_duplex
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SERIAL_DRIVER = usart
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```
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Next configure the hardware via your config.h:
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```c
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#define SERIAL_USART_FULL_DUPLEX // Enable full duplex operation mode.
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#define SERIAL_USART_TX_PIN B6 // USART TX pin
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#define SERIAL_USART_RX_PIN B7 // USART RX pin
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//#define USART1_REMAP // Remap USART TX and RX pins on STM32F103 MCUs, see table below.
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@ -104,17 +105,17 @@ Next configure the hardware via your config.h:
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// 3: 57600 baud
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// 4: 38400 baud
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// 5: 19200 baud
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#define SERIAL_USART_DRIVER UARTD1 // USART driver of TX and RX pin. default: UARTD1
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#define SERIAL_USART_DRIVER SD1 // USART driver of TX and RX pin. default: SD1
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#define SERIAL_USART_TX_PAL_MODE 7 // Pin "alternate function", see the respective datasheet for the appropriate values for your MCU. default: 7
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#define SERIAL_USART_RX_PAL_MODE 7 // Pin "alternate function", see the respective datasheet for the appropriate values for your MCU. default: 7
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#define SERIAL_USART_TIMEOUT 100 // USART driver timeout. default 100
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```
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You must also enable the ChibiOS `UART` with blocking api feature:
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* In your board's halconf.h: `#define HAL_USE_UART TRUE` and `#define UART_USE_WAIT TRUE`
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* In your board's mcuconf.h: `#define STM32_UART_USE_USARTn TRUE` (where 'n' matches the peripheral number of your selected USART on the MCU)
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You must also enable the ChibiOS `SERIAL` feature:
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* In your board's halconf.h: `#define HAL_USE_SERIAL TRUE`
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* In your board's mcuconf.h: `#define STM32_SERIAL_USE_USARTn TRUE` (where 'n' matches the peripheral number of your selected USART on the MCU)
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Do note that the configuration required is for the `UART` peripheral, not the `SERIAL` peripheral.
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Do note that the configuration required is for the `SERIAL` peripheral, not the `UART` peripheral.
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#### Pins for USART Peripherals with Alternate Functions for selected STM32 MCUs
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@ -16,179 +16,300 @@
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#include "serial_usart.h"
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#ifndef USE_GPIOV1
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// The default PAL alternate modes are used to signal that the pins are used for USART
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# ifndef SERIAL_USART_TX_PAL_MODE
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# define SERIAL_USART_TX_PAL_MODE 7
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#if defined(SERIAL_USART_CONFIG)
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static SerialConfig serial_config = SERIAL_USART_CONFIG;
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#else
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static SerialConfig serial_config = {
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.speed = (SERIAL_USART_SPEED), /* speed - mandatory */
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.cr1 = (SERIAL_USART_CR1),
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.cr2 = (SERIAL_USART_CR2),
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# if !defined(SERIAL_USART_FULL_DUPLEX)
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.cr3 = ((SERIAL_USART_CR3) | USART_CR3_HDSEL) /* activate half-duplex mode */
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# else
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.cr3 = (SERIAL_USART_CR3)
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# endif
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};
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#endif
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#ifndef SERIAL_USART_DRIVER
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# define SERIAL_USART_DRIVER SD1
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#endif
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static SerialDriver* serial_driver = &SERIAL_USART_DRIVER;
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#ifdef SOFT_SERIAL_PIN
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# define SERIAL_USART_TX_PIN SOFT_SERIAL_PIN
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#endif
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static inline bool react_to_transactions(void);
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static inline bool __attribute__((nonnull)) receive(uint8_t* destination, const size_t size);
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static inline bool __attribute__((nonnull)) send(const uint8_t* source, const size_t size);
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static inline int initiate_transaction(uint8_t sstd_index);
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static inline void usart_clear(void);
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static inline msg_t sdWriteHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size) {
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msg_t ret = sdWrite(driver, data, size);
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/**
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* @brief Clear the receive input queue.
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*/
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static inline void usart_clear(void) {
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osalSysLock();
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bool volatile queue_not_empty = !iqIsEmptyI(&serial_driver->iqueue);
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osalSysUnlock();
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// Half duplex requires us to read back the data we just wrote - just throw it away
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uint8_t dump[size];
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sdRead(driver, dump, size);
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return ret;
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}
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#undef sdWrite
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#define sdWrite sdWriteHalfDuplex
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static inline msg_t sdWriteTimeoutHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size, uint32_t timeout) {
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msg_t ret = sdWriteTimeout(driver, data, size, timeout);
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// Half duplex requires us to read back the data we just wrote - just throw it away
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uint8_t dump[size];
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sdReadTimeout(driver, dump, size, timeout);
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return ret;
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}
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#undef sdWriteTimeout
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#define sdWriteTimeout sdWriteTimeoutHalfDuplex
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static inline void sdClear(SerialDriver* driver) {
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while (sdGetTimeout(driver, TIME_IMMEDIATE) != MSG_TIMEOUT) {
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// Do nothing with the data
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while (queue_not_empty) {
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osalSysLock();
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/* Hard reset the input queue. */
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iqResetI(&serial_driver->iqueue);
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osalSysUnlock();
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/* Allow pending interrupts to preempt.
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* Do not merge the lock/unlock blocks into one
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* or the code will not work properly.
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* The empty read adds a tiny amount of delay. */
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(void)queue_not_empty;
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osalSysLock();
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queue_not_empty = !iqIsEmptyI(&serial_driver->iqueue);
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osalSysUnlock();
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}
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}
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static SerialConfig sdcfg = {
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(SERIAL_USART_SPEED), // speed - mandatory
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(SERIAL_USART_CR1), // CR1
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(SERIAL_USART_CR2), // CR2
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(SERIAL_USART_CR3) // CR3
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};
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void handle_soft_serial_slave(void);
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/*
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* This thread runs on the slave and responds to transactions initiated
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* by the master
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/**
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* @brief Blocking send of buffer with timeout.
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*
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* @return true Send success.
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* @return false Send failed.
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*/
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static THD_WORKING_AREA(waSlaveThread, 2048);
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static inline bool send(const uint8_t* source, const size_t size) {
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bool success = (size_t)sdWriteTimeout(serial_driver, source, size, TIME_MS2I(SERIAL_USART_TIMEOUT)) == size;
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#if !defined(SERIAL_USART_FULL_DUPLEX)
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if (success) {
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/* Half duplex fills the input queue with the data we wrote - just throw it away.
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Under the right circumstances (e.g. bad cables paired with high baud rates)
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less bytes can be present in the input queue, therefore a timeout is needed. */
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uint8_t dump[size];
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return receive(dump, size);
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}
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#endif
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return success;
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}
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/**
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* @brief Blocking receive of size * bytes with timeout.
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*
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* @return true Receive success.
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* @return false Receive failed.
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*/
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static inline bool receive(uint8_t* destination, const size_t size) {
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bool success = (size_t)sdReadTimeout(serial_driver, destination, size, TIME_MS2I(SERIAL_USART_TIMEOUT)) == size;
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return success;
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}
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#if !defined(SERIAL_USART_FULL_DUPLEX)
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/**
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* @brief Initiate pins for USART peripheral. Half-duplex configuration.
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*/
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__attribute__((weak)) void usart_init(void) {
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# if defined(MCU_STM32)
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# if defined(USE_GPIOV1)
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palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
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# else
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palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_TX_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
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# endif
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# if defined(USART_REMAP)
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USART_REMAP;
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# endif
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# else
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# pragma message "usart_init: MCU Familiy not supported by default, please supply your own init code by implementing usart_init() in your keyboard files."
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# endif
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}
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#else
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/**
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* @brief Initiate pins for USART peripheral. Full-duplex configuration.
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*/
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__attribute__((weak)) void usart_init(void) {
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# if defined(MCU_STM32)
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# if defined(USE_GPIOV1)
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palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetLineMode(SERIAL_USART_RX_PIN, PAL_MODE_INPUT);
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# else
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palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_TX_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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palSetLineMode(SERIAL_USART_RX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_RX_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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# endif
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# if defined(USART_REMAP)
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USART_REMAP;
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# endif
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# else
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# pragma message "usart_init: MCU Familiy not supported by default, please supply your own init code by implementing usart_init() in your keyboard files."
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# endif
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}
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#endif
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/**
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* @brief Overridable master specific initializations.
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*/
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__attribute__((weak, nonnull)) void usart_master_init(SerialDriver** driver) {
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(void)driver;
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usart_init();
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}
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/**
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* @brief Overridable slave specific initializations.
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*/
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__attribute__((weak, nonnull)) void usart_slave_init(SerialDriver** driver) {
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(void)driver;
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usart_init();
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}
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/**
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* @brief This thread runs on the slave and responds to transactions initiated
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* by the master.
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*/
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static THD_WORKING_AREA(waSlaveThread, 1024);
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static THD_FUNCTION(SlaveThread, arg) {
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(void)arg;
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chRegSetThreadName("slave_transport");
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chRegSetThreadName("usart_tx_rx");
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while (true) {
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handle_soft_serial_slave();
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if (!react_to_transactions()) {
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/* Clear the receive queue, to start with a clean slate.
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* Parts of failed transactions or spurious bytes could still be in it. */
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usart_clear();
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}
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}
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}
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__attribute__((weak)) void usart_init(void) {
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#if defined(USE_GPIOV1)
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palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
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#else
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palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_TX_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
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#endif
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/**
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* @brief Slave specific initializations.
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*/
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void soft_serial_target_init(void) {
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usart_slave_init(&serial_driver);
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#if defined(USART_REMAP)
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USART_REMAP;
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#endif
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}
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sdStart(serial_driver, &serial_config);
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void usart_master_init(void) {
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usart_init();
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sdcfg.cr3 |= USART_CR3_HDSEL;
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sdStart(&SERIAL_USART_DRIVER, &sdcfg);
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}
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void usart_slave_init(void) {
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usart_init();
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sdcfg.cr3 |= USART_CR3_HDSEL;
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sdStart(&SERIAL_USART_DRIVER, &sdcfg);
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// Start transport thread
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/* Start transport thread. */
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chThdCreateStatic(waSlaveThread, sizeof(waSlaveThread), HIGHPRIO, SlaveThread, NULL);
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}
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void soft_serial_initiator_init(void) { usart_master_init(); }
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/**
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* @brief React to transactions started by the master.
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*/
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static inline bool react_to_transactions(void) {
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/* Wait until there is a transaction for us. */
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uint8_t sstd_index = (uint8_t)sdGet(serial_driver);
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void soft_serial_target_init(void) { usart_slave_init(); }
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/* Sanity check that we are actually responding to a valid transaction. */
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if (sstd_index >= NUM_TOTAL_TRANSACTIONS) {
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return false;
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}
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void handle_soft_serial_slave(void) {
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uint8_t sstd_index = sdGet(&SERIAL_USART_DRIVER); // first chunk is always transaction id
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split_transaction_desc_t* trans = &split_transaction_table[sstd_index];
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split_transaction_desc_t* trans = &split_transaction_table[sstd_index];
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// Always write back the sstd_index as part of a basic handshake
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/* Send back the handshake which is XORed as a simple checksum,
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to signal that the slave is ready to receive possible transaction buffers */
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sstd_index ^= HANDSHAKE_MAGIC;
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sdWrite(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index));
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if (!send(&sstd_index, sizeof(sstd_index))) {
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*trans->status = TRANSACTION_DATA_ERROR;
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return false;
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}
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/* Receive transaction buffer from the master. If this transaction requires it.*/
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if (trans->initiator2target_buffer_size) {
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sdRead(&SERIAL_USART_DRIVER, split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size);
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if (!receive(split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size)) {
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*trans->status = TRANSACTION_DATA_ERROR;
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return false;
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}
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}
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// Allow any slave processing to occur
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/* Allow any slave processing to occur. */
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if (trans->slave_callback) {
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trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->target2initiator_buffer_size, split_trans_target2initiator_buffer(trans));
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trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size, split_trans_target2initiator_buffer(trans));
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}
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/* Send transaction buffer to the master. If this transaction requires it. */
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if (trans->target2initiator_buffer_size) {
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sdWrite(&SERIAL_USART_DRIVER, split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size);
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if (!send(split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size)) {
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*trans->status = TRANSACTION_DATA_ERROR;
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return false;
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}
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}
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if (trans->status) {
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*trans->status = TRANSACTION_ACCEPTED;
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}
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*trans->status = TRANSACTION_ACCEPTED;
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return true;
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}
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/////////
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// start transaction by initiator
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//
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// int soft_serial_transaction(int sstd_index)
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//
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// Returns:
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// TRANSACTION_END
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// TRANSACTION_NO_RESPONSE
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// TRANSACTION_DATA_ERROR
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/**
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* @brief Master specific initializations.
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*/
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void soft_serial_initiator_init(void) {
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usart_master_init(&serial_driver);
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#if defined(MCU_STM32) && defined(SERIAL_USART_PIN_SWAP)
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serial_config.cr2 |= USART_CR2_SWAP; // master has swapped TX/RX pins
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#endif
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sdStart(serial_driver, &serial_config);
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}
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/**
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* @brief Start transaction from the master half to the slave half.
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*
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* @param index Transaction Table index of the transaction to start.
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* @return int TRANSACTION_NO_RESPONSE in case of Timeout.
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* TRANSACTION_TYPE_ERROR in case of invalid transaction index.
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* TRANSACTION_END in case of success.
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*/
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int soft_serial_transaction(int index) {
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uint8_t sstd_index = index;
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/* Clear the receive queue, to start with a clean slate.
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* Parts of failed transactions or spurious bytes could still be in it. */
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usart_clear();
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return initiate_transaction((uint8_t)index);
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}
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/**
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* @brief Initiate transaction to slave half.
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*/
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static inline int initiate_transaction(uint8_t sstd_index) {
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/* Sanity check that we are actually starting a valid transaction. */
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if (sstd_index >= NUM_TOTAL_TRANSACTIONS) {
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dprintln("USART: Illegal transaction Id.");
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return TRANSACTION_TYPE_ERROR;
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}
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if (sstd_index > NUM_TOTAL_TRANSACTIONS) return TRANSACTION_TYPE_ERROR;
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split_transaction_desc_t* trans = &split_transaction_table[sstd_index];
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msg_t res = 0;
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||||
|
||||
if (!trans->status) return TRANSACTION_TYPE_ERROR; // not registered
|
||||
/* Transaction is not registered. Abort. */
|
||||
if (!trans->status) {
|
||||
dprintln("USART: Transaction not registered.");
|
||||
return TRANSACTION_TYPE_ERROR;
|
||||
}
|
||||
|
||||
sdClear(&SERIAL_USART_DRIVER);
|
||||
|
||||
// First chunk is always transaction id
|
||||
sdWriteTimeout(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index), TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
/* Send transaction table index to the slave, which doubles as basic handshake token. */
|
||||
if (!send(&sstd_index, sizeof(sstd_index))) {
|
||||
dprintln("USART: Send Handshake failed.");
|
||||
return TRANSACTION_TYPE_ERROR;
|
||||
}
|
||||
|
||||
uint8_t sstd_index_shake = 0xFF;
|
||||
|
||||
// Which we always read back first so that we can error out correctly
|
||||
// - due to the half duplex limitations on return codes, we always have to read *something*
|
||||
// - without the read, write only transactions *always* succeed, even during the boot process where the slave is not ready
|
||||
res = sdReadTimeout(&SERIAL_USART_DRIVER, &sstd_index_shake, sizeof(sstd_index_shake), TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
if (res < 0 || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) {
|
||||
dprintf("serial::usart_shake NO_RESPONSE\n");
|
||||
/* Which we always read back first so that we can error out correctly.
|
||||
* - due to the half duplex limitations on return codes, we always have to read *something*.
|
||||
* - without the read, write only transactions *always* succeed, even during the boot process where the slave is not ready.
|
||||
*/
|
||||
if (!receive(&sstd_index_shake, sizeof(sstd_index_shake)) || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) {
|
||||
dprintln("USART: Handshake failed.");
|
||||
return TRANSACTION_NO_RESPONSE;
|
||||
}
|
||||
|
||||
/* Send transaction buffer to the slave. If this transaction requires it. */
|
||||
if (trans->initiator2target_buffer_size) {
|
||||
res = sdWriteTimeout(&SERIAL_USART_DRIVER, split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size, TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
if (res < 0) {
|
||||
dprintf("serial::usart_transmit NO_RESPONSE\n");
|
||||
if (!send(split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size)) {
|
||||
dprintln("USART: Send failed.");
|
||||
return TRANSACTION_NO_RESPONSE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Receive transaction buffer from the slave. If this transaction requires it. */
|
||||
if (trans->target2initiator_buffer_size) {
|
||||
res = sdReadTimeout(&SERIAL_USART_DRIVER, split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size, TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
if (res < 0) {
|
||||
dprintf("serial::usart_receive NO_RESPONSE\n");
|
||||
if (!receive(split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size)) {
|
||||
dprintln("USART: Receive failed.");
|
||||
return TRANSACTION_NO_RESPONSE;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -23,19 +23,45 @@
|
|||
#include <ch.h>
|
||||
#include <hal.h>
|
||||
|
||||
#ifndef USART_CR1_M0
|
||||
#if !defined(SERIAL_USART_DRIVER)
|
||||
# define SERIAL_USART_DRIVER SD1
|
||||
#endif
|
||||
|
||||
#if !defined(USE_GPIOV1)
|
||||
/* The default PAL alternate modes are used to signal that the pins are used for USART. */
|
||||
# if !defined(SERIAL_USART_TX_PAL_MODE)
|
||||
# define SERIAL_USART_TX_PAL_MODE 7
|
||||
# endif
|
||||
# if !defined(SERIAL_USART_RX_PAL_MODE)
|
||||
# define SERIAL_USART_RX_PAL_MODE 7
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if defined(SOFT_SERIAL_PIN)
|
||||
# define SERIAL_USART_TX_PIN SOFT_SERIAL_PIN
|
||||
#endif
|
||||
|
||||
#if !defined(SERIAL_USART_TX_PIN)
|
||||
# define SERIAL_USART_TX_PIN A9
|
||||
#endif
|
||||
|
||||
#if !defined(SERIAL_USART_RX_PIN)
|
||||
# define SERIAL_USART_RX_PIN A10
|
||||
#endif
|
||||
|
||||
#if !defined(USART_CR1_M0)
|
||||
# define USART_CR1_M0 USART_CR1_M // some platforms (f1xx) dont have this so
|
||||
#endif
|
||||
|
||||
#ifndef SERIAL_USART_CR1
|
||||
#if !defined(SERIAL_USART_CR1)
|
||||
# define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0) // parity enable, odd parity, 9 bit length
|
||||
#endif
|
||||
|
||||
#ifndef SERIAL_USART_CR2
|
||||
#if !defined(SERIAL_USART_CR2)
|
||||
# define SERIAL_USART_CR2 (USART_CR2_STOP_1) // 2 stop bits
|
||||
#endif
|
||||
|
||||
#ifndef SERIAL_USART_CR3
|
||||
#if !defined(SERIAL_USART_CR3)
|
||||
# define SERIAL_USART_CR3 0
|
||||
#endif
|
||||
|
||||
|
|
@ -61,11 +87,11 @@
|
|||
} while (0)
|
||||
#endif
|
||||
|
||||
#ifndef SELECT_SOFT_SERIAL_SPEED
|
||||
#if !defined(SELECT_SOFT_SERIAL_SPEED)
|
||||
# define SELECT_SOFT_SERIAL_SPEED 1
|
||||
#endif
|
||||
|
||||
#ifdef SERIAL_USART_SPEED
|
||||
#if defined(SERIAL_USART_SPEED)
|
||||
// Allow advanced users to directly set SERIAL_USART_SPEED
|
||||
#elif SELECT_SOFT_SERIAL_SPEED == 0
|
||||
# define SERIAL_USART_SPEED 460800
|
||||
|
|
@ -83,7 +109,7 @@
|
|||
# error invalid SELECT_SOFT_SERIAL_SPEED value
|
||||
#endif
|
||||
|
||||
#ifndef SERIAL_USART_TIMEOUT
|
||||
#if !defined(SERIAL_USART_TIMEOUT)
|
||||
# define SERIAL_USART_TIMEOUT 100
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -1,261 +0,0 @@
|
|||
/* Copyright 2021 QMK
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include "serial_usart.h"
|
||||
|
||||
#include <stdatomic.h>
|
||||
|
||||
#if !defined(USE_GPIOV1)
|
||||
// The default PAL alternate modes are used to signal that the pins are used for USART
|
||||
# if !defined(SERIAL_USART_TX_PAL_MODE)
|
||||
# define SERIAL_USART_TX_PAL_MODE 7
|
||||
# endif
|
||||
# if !defined(SERIAL_USART_RX_PAL_MODE)
|
||||
# define SERIAL_USART_RX_PAL_MODE 7
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if !defined(SERIAL_USART_DRIVER)
|
||||
# define SERIAL_USART_DRIVER UARTD1
|
||||
#endif
|
||||
|
||||
#if !defined(SERIAL_USART_TX_PIN)
|
||||
# define SERIAL_USART_TX_PIN A9
|
||||
#endif
|
||||
|
||||
#if !defined(SERIAL_USART_RX_PIN)
|
||||
# define SERIAL_USART_RX_PIN A10
|
||||
#endif
|
||||
|
||||
#define SIGNAL_HANDSHAKE_RECEIVED 0x1
|
||||
|
||||
void handle_transactions_slave(uint8_t sstd_index);
|
||||
static void receive_transaction_handshake(UARTDriver* uartp, uint16_t received_handshake);
|
||||
|
||||
/*
|
||||
* UART driver configuration structure. We use the blocking DMA enabled API and
|
||||
* the rxchar callback to receive handshake tokens but only on the slave halve.
|
||||
*/
|
||||
// clang-format off
|
||||
static UARTConfig uart_config = {
|
||||
.txend1_cb = NULL,
|
||||
.txend2_cb = NULL,
|
||||
.rxend_cb = NULL,
|
||||
.rxchar_cb = NULL,
|
||||
.rxerr_cb = NULL,
|
||||
.timeout_cb = NULL,
|
||||
.speed = (SERIAL_USART_SPEED),
|
||||
.cr1 = (SERIAL_USART_CR1),
|
||||
.cr2 = (SERIAL_USART_CR2),
|
||||
.cr3 = (SERIAL_USART_CR3)
|
||||
};
|
||||
// clang-format on
|
||||
|
||||
static SSTD_t* Transaction_table = NULL;
|
||||
static uint8_t Transaction_table_size = 0;
|
||||
static atomic_uint_least8_t handshake = 0xFF;
|
||||
static thread_reference_t tp_target = NULL;
|
||||
|
||||
/*
|
||||
* This callback is invoked when a character is received but the application
|
||||
* was not ready to receive it, the character is passed as parameter.
|
||||
* Receive transaction table index from initiator, which doubles as basic handshake token. */
|
||||
static void receive_transaction_handshake(UARTDriver* uartp, uint16_t received_handshake) {
|
||||
/* Check if received handshake is not a valid transaction id.
|
||||
* Please note that we can still catch a seemingly valid handshake
|
||||
* i.e. a byte from a ongoing transfer which is in the allowed range.
|
||||
* So this check mainly prevents any obviously wrong handshakes and
|
||||
* subsequent wakeups of the receiving thread, which is a costly operation. */
|
||||
if (received_handshake > Transaction_table_size) {
|
||||
return;
|
||||
}
|
||||
|
||||
handshake = (uint8_t)received_handshake;
|
||||
chSysLockFromISR();
|
||||
/* Wakeup receiving thread to start a transaction. */
|
||||
chEvtSignalI(tp_target, (eventmask_t)SIGNAL_HANDSHAKE_RECEIVED);
|
||||
chSysUnlockFromISR();
|
||||
}
|
||||
|
||||
__attribute__((weak)) void usart_init(void) {
|
||||
#if defined(USE_GPIOV1)
|
||||
palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
|
||||
palSetLineMode(SERIAL_USART_RX_PIN, PAL_MODE_INPUT);
|
||||
#else
|
||||
palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_TX_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetLineMode(SERIAL_USART_RX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_RX_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* This thread runs on the slave half and reacts to transactions initiated from the master.
|
||||
*/
|
||||
static THD_WORKING_AREA(waSlaveThread, 1024);
|
||||
static THD_FUNCTION(SlaveThread, arg) {
|
||||
(void)arg;
|
||||
chRegSetThreadName("slave_usart_tx_rx");
|
||||
|
||||
while (true) {
|
||||
/* We sleep as long as there is no handshake waiting for us. */
|
||||
chEvtWaitAny((eventmask_t)SIGNAL_HANDSHAKE_RECEIVED);
|
||||
handle_transactions_slave(handshake);
|
||||
}
|
||||
}
|
||||
|
||||
void soft_serial_target_init(SSTD_t* const sstd_table, int sstd_table_size) {
|
||||
Transaction_table = sstd_table;
|
||||
Transaction_table_size = (uint8_t)sstd_table_size;
|
||||
usart_init();
|
||||
|
||||
#if defined(USART_REMAP)
|
||||
USART_REMAP;
|
||||
#endif
|
||||
|
||||
tp_target = chThdCreateStatic(waSlaveThread, sizeof(waSlaveThread), HIGHPRIO, SlaveThread, NULL);
|
||||
|
||||
// Start receiving handshake tokens on slave halve
|
||||
uart_config.rxchar_cb = receive_transaction_handshake;
|
||||
uartStart(&SERIAL_USART_DRIVER, &uart_config);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief React to transactions started by the master.
|
||||
* This version uses duplex send and receive usart pheriphals and DMA backed transfers.
|
||||
*/
|
||||
void inline handle_transactions_slave(uint8_t sstd_index) {
|
||||
size_t buffer_size = 0;
|
||||
msg_t msg = 0;
|
||||
SSTD_t* trans = &Transaction_table[sstd_index];
|
||||
|
||||
/* Send back the handshake which is XORed as a simple checksum,
|
||||
to signal that the slave is ready to receive possible transaction buffers */
|
||||
sstd_index ^= HANDSHAKE_MAGIC;
|
||||
buffer_size = (size_t)sizeof(sstd_index);
|
||||
msg = uartSendTimeout(&SERIAL_USART_DRIVER, &buffer_size, &sstd_index, TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
|
||||
if (msg != MSG_OK) {
|
||||
if (trans->status) {
|
||||
*trans->status = TRANSACTION_NO_RESPONSE;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/* Receive transaction buffer from the master. If this transaction requires it.*/
|
||||
buffer_size = (size_t)trans->initiator2target_buffer_size;
|
||||
if (buffer_size) {
|
||||
msg = uartReceiveTimeout(&SERIAL_USART_DRIVER, &buffer_size, trans->initiator2target_buffer, TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
if (msg != MSG_OK) {
|
||||
if (trans->status) {
|
||||
*trans->status = TRANSACTION_NO_RESPONSE;
|
||||
}
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/* Send transaction buffer to the master. If this transaction requires it. */
|
||||
buffer_size = (size_t)trans->target2initiator_buffer_size;
|
||||
if (buffer_size) {
|
||||
msg = uartSendFullTimeout(&SERIAL_USART_DRIVER, &buffer_size, trans->target2initiator_buffer, TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
if (msg != MSG_OK) {
|
||||
if (trans->status) {
|
||||
*trans->status = TRANSACTION_NO_RESPONSE;
|
||||
}
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
if (trans->status) {
|
||||
*trans->status = TRANSACTION_ACCEPTED;
|
||||
}
|
||||
}
|
||||
|
||||
void soft_serial_initiator_init(SSTD_t* const sstd_table, int sstd_table_size) {
|
||||
Transaction_table = sstd_table;
|
||||
Transaction_table_size = (uint8_t)sstd_table_size;
|
||||
usart_init();
|
||||
|
||||
#if defined(SERIAL_USART_PIN_SWAP)
|
||||
uart_config.cr2 |= USART_CR2_SWAP; // master has swapped TX/RX pins
|
||||
#endif
|
||||
|
||||
#if defined(USART_REMAP)
|
||||
USART_REMAP;
|
||||
#endif
|
||||
|
||||
uartStart(&SERIAL_USART_DRIVER, &uart_config);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start transaction from the master to the slave.
|
||||
* This version uses duplex send and receive usart pheriphals and DMA backed transfers.
|
||||
*
|
||||
* @param index Transaction Table index of the transaction to start.
|
||||
* @return int TRANSACTION_NO_RESPONSE in case of Timeout.
|
||||
* TRANSACTION_TYPE_ERROR in case of invalid transaction index.
|
||||
* TRANSACTION_END in case of success.
|
||||
*/
|
||||
#if !defined(SERIAL_USE_MULTI_TRANSACTION)
|
||||
int soft_serial_transaction(void) {
|
||||
uint8_t sstd_index = 0;
|
||||
#else
|
||||
int soft_serial_transaction(int index) {
|
||||
uint8_t sstd_index = index;
|
||||
#endif
|
||||
|
||||
if (sstd_index > Transaction_table_size) {
|
||||
return TRANSACTION_TYPE_ERROR;
|
||||
}
|
||||
|
||||
SSTD_t* const trans = &Transaction_table[sstd_index];
|
||||
msg_t msg = 0;
|
||||
size_t buffer_size = (size_t)sizeof(sstd_index);
|
||||
|
||||
/* Send transaction table index to the slave, which doubles as basic handshake token. */
|
||||
uartSendFullTimeout(&SERIAL_USART_DRIVER, &buffer_size, &sstd_index, TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
|
||||
uint8_t sstd_index_shake = 0xFF;
|
||||
buffer_size = (size_t)sizeof(sstd_index_shake);
|
||||
|
||||
/* Receive the handshake token from the slave. The token was XORed by the slave as a simple checksum.
|
||||
If the tokens match, the master will start to send and receive possible transaction buffers. */
|
||||
msg = uartReceiveTimeout(&SERIAL_USART_DRIVER, &buffer_size, &sstd_index_shake, TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
if (msg != MSG_OK || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) {
|
||||
dprintln("USART: Handshake Failed");
|
||||
return TRANSACTION_NO_RESPONSE;
|
||||
}
|
||||
|
||||
/* Send transaction buffer to the slave. If this transaction requires it. */
|
||||
buffer_size = (size_t)trans->initiator2target_buffer_size;
|
||||
if (buffer_size) {
|
||||
msg = uartSendFullTimeout(&SERIAL_USART_DRIVER, &buffer_size, trans->initiator2target_buffer, TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
if (msg != MSG_OK) {
|
||||
dprintln("USART: Send Failed");
|
||||
return TRANSACTION_NO_RESPONSE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Receive transaction buffer from the slave. If this transaction requires it. */
|
||||
buffer_size = (size_t)trans->target2initiator_buffer_size;
|
||||
if (buffer_size) {
|
||||
msg = uartReceiveTimeout(&SERIAL_USART_DRIVER, &buffer_size, trans->target2initiator_buffer, TIME_MS2I(SERIAL_USART_TIMEOUT));
|
||||
if (msg != MSG_OK) {
|
||||
dprintln("USART: Receive Failed");
|
||||
return TRANSACTION_NO_RESPONSE;
|
||||
}
|
||||
}
|
||||
|
||||
return TRANSACTION_END;
|
||||
}
|
||||
|
|
@ -412,7 +412,7 @@
|
|||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#define SERIAL_BUFFERS_SIZE 128
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
|
|
|
|||
|
|
@ -412,7 +412,7 @@
|
|||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#define SERIAL_BUFFERS_SIZE 128
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
|
|
|
|||
Loading…
Reference in New Issue