tudattr
/
qmk_firmware
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Tidy up existing i2c_master implementations (#15376) 

* Move chibios defines out of header

* Make some avr defines internal
master
Joel Challis 2021-12-02 14:32:31 +00:00 committed by GitHub
parent 4466261895
commit 3bf2403244
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 71 additions and 81 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
keyboards/matrix/m20add/m20add.c
View File

@ -53,25 +53,6 @@ bool led_update_kb(led_t led_state) {
return res;
}
// override the default implementation to avoid re-initialization
void i2c_init(void)
{
static bool initialized = false;
if (initialized) {
return;
} else {
initialized = true;
}
// Try releasing special pins for a short time
palSetLineMode(I2C1_SCL_PIN, PAL_MODE_INPUT);
palSetLineMode(I2C1_SDA_PIN, PAL_MODE_INPUT);
chThdSleepMilliseconds(10);
palSetLineMode(I2C1_SCL_PIN, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
palSetLineMode(I2C1_SDA_PIN, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
}
#define REBOOT_MAGIC 0x41544B42
void shutdown_user(void)
{

6
keyboards/yanghu/unicorne/config.h
View File

@ -42,6 +42,12 @@
#define ENCODERS_PAD_B \
{ B12, B0 }
/* I2C - required for custom i2c_init */
#define I2C1_SCL_PIN B6
#define I2C1_SDA_PIN B7
#define I2C1_SCL_PAL_MODE 4
#define I2C1_SDA_PAL_MODE 4
/* Audio */
#define AUDIO_PIN A8
#define AUDIO_PWM_PAL_MODE 1

7
platforms/avr/drivers/i2c_master.c
View File

@ -32,6 +32,9 @@
# define I2C_START_RETRY_COUNT 20
#endif // I2C_START_RETRY_COUNT
#define I2C_ACTION_READ 0x01
#define I2C_ACTION_WRITE 0x00
#define TWBR_val (((F_CPU / F_SCL) - 16) / 2)
#define MAX(X, Y) ((X) > (Y) ? (X) : (Y))
@ -154,7 +157,7 @@ int16_t i2c_read_nack(uint16_t timeout) {
}
i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
i2c_status_t status = i2c_start(address | I2C_WRITE, timeout);
i2c_status_t status = i2c_start(address | I2C_ACTION_WRITE, timeout);
for (uint16_t i = 0; i < length && status >= 0; i++) {
status = i2c_write(data[i], timeout);
@ -166,7 +169,7 @@ i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length,
}
i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
i2c_status_t status = i2c_start(address | I2C_READ, timeout);
i2c_status_t status = i2c_start(address | I2C_ACTION_READ, timeout);
for (uint16_t i = 0; i < (length - 1) && status >= 0; i++) {
status = i2c_read_ack(timeout);

59
platforms/chibios/drivers/i2c_master.c
View File

@ -27,8 +27,67 @@
#include "quantum.h"
#include "i2c_master.h"
#include <string.h>
#include <ch.h>
#include <hal.h>
#ifndef I2C1_SCL_PIN
# define I2C1_SCL_PIN B6
#endif
#ifndef I2C1_SDA_PIN
# define I2C1_SDA_PIN B7
#endif
#ifdef USE_I2CV1
# ifndef I2C1_OPMODE
# define I2C1_OPMODE OPMODE_I2C
# endif
# ifndef I2C1_CLOCK_SPEED
# define I2C1_CLOCK_SPEED 100000 /* 400000 */
# endif
# ifndef I2C1_DUTY_CYCLE
# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
# endif
#else
// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
# ifndef I2C1_TIMINGR_PRESC
# define I2C1_TIMINGR_PRESC 0U
# endif
# ifndef I2C1_TIMINGR_SCLDEL
# define I2C1_TIMINGR_SCLDEL 7U
# endif
# ifndef I2C1_TIMINGR_SDADEL
# define I2C1_TIMINGR_SDADEL 0U
# endif
# ifndef I2C1_TIMINGR_SCLH
# define I2C1_TIMINGR_SCLH 38U
# endif
# ifndef I2C1_TIMINGR_SCLL
# define I2C1_TIMINGR_SCLL 129U
# endif
#endif
#ifndef I2C_DRIVER
# define I2C_DRIVER I2CD1
#endif
#ifdef USE_GPIOV1
# ifndef I2C1_SCL_PAL_MODE
# define I2C1_SCL_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
# endif
# ifndef I2C1_SDA_PAL_MODE
# define I2C1_SDA_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
# endif
#else
// The default PAL alternate modes are used to signal that the pins are used for I2C
# ifndef I2C1_SCL_PAL_MODE
# define I2C1_SCL_PAL_MODE 4
# endif
# ifndef I2C1_SDA_PAL_MODE
# define I2C1_SDA_PAL_MODE 4
# endif
#endif
static uint8_t i2c_address;
static const I2CConfig i2cconfig = {

61
platforms/chibios/drivers/i2c_master.h
View File

@ -24,66 +24,7 @@
*/
#pragma once
#include <ch.h>
#include <hal.h>
#ifndef I2C1_SCL_PIN
# define I2C1_SCL_PIN B6
#endif
#ifndef I2C1_SDA_PIN
# define I2C1_SDA_PIN B7
#endif
#ifdef USE_I2CV1
# ifndef I2C1_OPMODE
# define I2C1_OPMODE OPMODE_I2C
# endif
# ifndef I2C1_CLOCK_SPEED
# define I2C1_CLOCK_SPEED 100000 /* 400000 */
# endif
# ifndef I2C1_DUTY_CYCLE
# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
# endif
#else
// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
# ifndef I2C1_TIMINGR_PRESC
# define I2C1_TIMINGR_PRESC 0U
# endif
# ifndef I2C1_TIMINGR_SCLDEL
# define I2C1_TIMINGR_SCLDEL 7U
# endif
# ifndef I2C1_TIMINGR_SDADEL
# define I2C1_TIMINGR_SDADEL 0U
# endif
# ifndef I2C1_TIMINGR_SCLH
# define I2C1_TIMINGR_SCLH 38U
# endif
# ifndef I2C1_TIMINGR_SCLL
# define I2C1_TIMINGR_SCLL 129U
# endif
#endif
#ifndef I2C_DRIVER
# define I2C_DRIVER I2CD1
#endif
#ifdef USE_GPIOV1
# ifndef I2C1_SCL_PAL_MODE
# define I2C1_SCL_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
# endif
# ifndef I2C1_SDA_PAL_MODE
# define I2C1_SDA_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
# endif
#else
// The default PAL alternate modes are used to signal that the pins are used for I2C
# ifndef I2C1_SCL_PAL_MODE
# define I2C1_SCL_PAL_MODE 4
# endif
# ifndef I2C1_SDA_PAL_MODE
# define I2C1_SDA_PAL_MODE 4
# endif
#endif
#include <stdint.h>
typedef int16_t i2c_status_t;